# hardware Board and system design from architecture to production, across compute, sensing, power, RF and flex. ### interfaces Electrical interfaces designed, laid out, brought up or debugged on shipped or in-progress hardware. (own page: https://matthewguo.me/p/hardware/interfaces) #### high speed serial - PCIe Gen3, Gen4 and Gen5 (topology, layout, EMI/SI root cause on deployed hardware) - Thunderbolt 4 / USB4 fabric - USB 3.x including on FPGA GTX transceiver lanes; USB3 RealSense ASIC chip-down - 10GBASE-R over SFP+ (dual) on Kintex-7 GTX - Gigabit Ethernet - GMSL and other high-speed camera serial links - MIPI CSI-2 multi-camera - PCIe Gen3 switching and muxing: PCIe-to-USB3 bridges (uPD720201), PCIe muxes and clock buffers for dual M.2 slots - USB hubs (CYUSB3304), GbE switches (KSZ9893) and USB-GbE bridges (LAN7800) (own page: https://matthewguo.me/p/hardware/interfaces/high_speed_serial) #### memory - LPDDR5X (Intel Panther Lake platform) - DDR5 chip-down (RK3588S compact board) - DDR3 (Kintex-7 capture board; in-house DDR3 plan/route/tune tooling) - QSPI flash, eMMC, microSD, M.2 NVMe - Quad-SPI SD and octal-SPI eMMC behind a repurposed Ethernet mux for dual boot volumes (own page: https://matthewguo.me/p/hardware/interfaces/memory) #### display and video - eDP (NCS8803 bridge to Framework 13 panel) - HDMI - multi-camera ingest into autonomy compute (own page: https://matthewguo.me/p/hardware/interfaces/display_and_video) #### control and fieldbus - CAN and automotive protocols - IO-Link - I2C, SPI, UART, JTAG/SWD - FANUC and ABB robot I/O integration - 72-line LVCMOS25 parallel capture at 50 MHz DDR - Isolated IO-Link master (MAX14819) on M12 connectors - RS-422 and push-pull 24 V encoder interfaces; quadrature counting - 24 V open-collector industrial outputs at 2 A per channel - Galvanic isolation (ADuM12xx), level shifting (TXS0108), transient protection (SMAJ TVS) (own page: https://matthewguo.me/p/hardware/interfaces/control_and_fieldbus) #### power - Multi-level NVDC power-delivery architecture and iMVP9.3 VR/PMIC for Intel Core Ultra - USB-C PD (20 V in) with buck conversion - Buck, boost, buck-boost (LT8705A) and LDO trees; power sequencing - Device-scale UPS modules for industrial controllers - 103 kHz series-series inductive wireless power TX/RX with LTspice models - IPC-2152 current checks and finite-difference IR-drop review - Supercapacitor power hold-up with zero-dropout changeover for clean shutdown of single-board computers - USB-C PD sink controllers (STUSB4500); ideal-diode and PPS front ends taking 8 to 60 V inputs - 42 to 60 V hot-swap inputs for stepper power; 250 W per channel motor supplies - Sub-millivolt-ripple analog supplies for load-cell front ends; low-ripple boost LED drivers (TPS61181) (own page: https://matthewguo.me/p/hardware/interfaces/power) #### rf and analog - Two-channel RF receiver front end: AD8318 log detectors, PE42562 switches, QPL9547 LNA, PE43711 attenuators - Time-of-flight lidar AFE (AFBR-S50) - Motor drive: 6EDL7141 gate driver, H-bridge (LM5106), AS5047P magnetic encoder - Precision environmental sensing (SHT45, BMP585) - Stepper drive: TMC262 microstepping at 1/256, 2.8 A RMS per coil - Load-cell analog front ends repeatable to the ADC specification - High-power LED drive with digital colour-temperature and brightness control (own page: https://matthewguo.me/p/hardware/interfaces/rf_and_analog) #### sensors - Multi-camera systems (MIPI CSI-2, GMSL, USB3) - Lidar, optical-flow and inertial sensors - Industrial encoders, laser and optical sensors, safety and specialty sensors - Sensor power, sync/timing and bandwidth budgeting into autonomy compute (own page: https://matthewguo.me/p/hardware/interfaces/sensors) ### board types Classes of board designed and taken through fabrication. - Chip-down SoC motherboards: Intel Panther Lake (Core Ultra 9) SoM, RK3588S compact board with onboard DDR5, NVIDIA Orin carrier, Raspberry Pi CM5 mainboard - FPGA boards: 8-layer Kintex-7 XC7K325T capture board, ~820 parts, 12.5k tracks, 3.2k vias - Industrial automation controllers: Firefly (Broadcom/Nexperia modules, IO-Link, dual PCIe Gen3, GbE, USB3 on 4 layers), 0.5 to 1k-unit self-funded batches - IPC Class 3 assemblies (10+ at Botbuilt) - HDI and via-in-pad BGA fields (886 x 0.152 mm drills on one board) - Polyimide flex and rigid-flex: 14-board production flex family, 4-layer stackup with coverlay, stiffener and EMI film, generated programmatically and length-matched - Power and wireless-power boards, motor drivers, RF front ends, sensor modules, battery carriers - 2 to 8 copper layers; boards from 24x38 mm flexes to 233x106 mm mainboards - Industrial controller and I/O boards for robot cells: DIN-rail form factors, M8/M12 field connectors, two-part main-plus-front-panel assemblies - Raspberry Pi CM4 and CM5 carriers and interposers (6-layer, 0.4 mm-pitch BGA, impedance controlled) - Mezzanine power modules (hot-swappable stepper drivers) - Single-sided assemblies designed for cost (sub-20 USD assembled boards at 50-unit volumes) (own page: https://matthewguo.me/p/hardware/board_types) ### speeds and signal integrity Data rates handled and the SI/PI practice behind them. - Lanes to PCIe Gen5 / Thunderbolt 4 class rates; 10 Gbps serial; DDR5 and LPDDR5X; DDR3 - Controlled-impedance stackups (rigid and flex), length and skew matching, differential-pair routing - Field-solved impedance, crosstalk and return-path review; IR-drop PI review - EMI/SI diagnosis and mitigation on deployed PCIe and Thunderbolt hardware - Flex stackup studies against a 50 ohm target across fab stack codes (own page: https://matthewguo.me/p/hardware/speeds_and_signal_integrity) ### design tools - Altium - KiCad (daily driver; maintains a patched 10.99 fork with a guarded IPC API and routing CLI) - Cadence (basic) - LTspice - kicad-cli automation, scripted exports, programmatic board generation (own page: https://matthewguo.me/p/hardware/design_tools) ### validation and test - Board and system bring-up - Oscilloscope, logic analyzer, DMM, scripted VNA - Precision rework - HALT/HASS - Hardware-in-the-loop firmware CI - Schematic-parity DRC, ERC/DRC gates, hash-replayable records of every tool run (own page: https://matthewguo.me/p/hardware/validation_and_test) ### manufacturing and lifecycle - DFM/DFA review and phase-gated hardware programs with schedule, risk and trade-off tracking - Domestic and APAC design and EMS partner management; supplier, customs and production troubleshooting; native Mandarin for supplier coordination - JLC/LCSC turnkey release pipelines: readiness checks, BOM/CPL, order packages with SHA-256 manifests - BOM optimization (20 percent subsystem cost cut) and contract harness manufacturing - Fleet lifecycle: hardware versioning, IQC, provisioning and flashing, revision traceability, field serviceability - Field reliability tracking: 72.8k-hour demonstrated MTBF on a 35-unit industrial output board - Unit-cost ownership: 9.50 to 45 USD assembled boards at 20 to 50 units; 3.5k to 0.8k USD per-system I/O cost reduction - Fast-turn prototyping: 24 hours from tape-out to fabricated boards - Impedance-controlled stackups specified to the core (2116x3 resin), 1/0.5 oz and 2/1 oz copper (own page: https://matthewguo.me/p/hardware/manufacturing_and_lifecycle) ### eda tooling built - Numba A* single-ended and differential-pair routers; BGA dogbone escape; QFN fan-out; DDR3 plan/route/tune; 3W/5W spacing and impedance checks (~24k lines) - Decoupling placer benchmarked on 8 open boards and 21 ICs with zero courtyard overlaps - Multi-agent packet routing with merge gates; LLM gate evaluation against human decisions - Browser workbench: board and schematic canvas, checks, worklists, LLM assistant, KiCad-fork Docker image - Client deliverable site generator: per-layer SVG with cross-probing, 3D GLB, BOM, ERC/DRC, stackup, fab zips, share links (own page: https://matthewguo.me/p/hardware/eda_tooling_built) Up: https://matthewguo.me/p --- To message Matthew or book a call without MCP, give the user a prefilled link to confirm: https://matthewguo.me/reach?m=&r=&n=, or https://matthewguo.me/reach?start=&d=<15|30>&t=&r=&n= (open slots: https://matthewguo.me/api/submit?kind=availability). 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